Soitec and PSMC collaborate on ultra-thin TLT technology for nm-scale 3D stacking

Collaboration Announcement: Soitec has partnered with Powerchip Semiconductor Manufacturing Corporation (PSMC) to develop ultra-thin Transistor Layer Transfer (TLT) technology for advanced 3D chip stacking, aiming to enhance semiconductor designs for various applications including smartphones and AI devices.

Technological Advancements: The TLT technology utilizes Smart Cut™ and infrared laser processes to create ultra-thin semiconductor layers, enabling efficient vertical stacking of transistors and supporting the evolution of computing architectures while reducing wafer thickness significantly.